I2C(3)                                                     I2C(3)

          i2c - I²C Bus Interface

          bind -a #J /dev


          The I²C (Inter-Integrated Circuit) bus is a serial bus stan-
          dard invented by Philips.  It is used to connect chips over
          short-distances like on a motherboard or between boards.
          The bus requires only a single data signal SDA, a clock sig-
          nal SDC and ground.  Devices on the bus have 7-bit or 10-bit
          addresses, which is determined by the device (see the
          datasheet).  Every device monitors the bus and waits for the
          master to initiate a transaction.  Each transaction starts
          with the master sending the target device address with a
          direction bit and the device acknowledges each byte received
          if its address matched.  Depending on the device, more bytes
          must be transmitted after the device-address. For example,
          encoding a register number at a memory offset.  We refer to
          these bytes as the sub-address. After the address phase, the
          data phase begins where zero or more data bytes are either
          transmitted or received depending on the transaction direc-

          This driver supports multiple buses (controllers) to be reg-
          istered by platform specific code in the kernel.  Each bus
          is represented as a directory with a platform specific name.

          Because all received bytes are acknowledged by target
          devices, it is possible for the master to enumerate all
          existing addresses on a bus, which is done when accessing
          the bus directory.

          Platform specific code can also register individual devices,
          supplying a meaningful device configuration.  It can also be
          necessary to manually register devices if the device has
          been disabled by an enable signal or otherwise inhibited
          during enumeration.

          Each device appears as a control ( i2c.n.ctl ) and a data
          file ( ) in the bus directory where n is the
          device-address in hexadecimal.

          The data file is used to initiate transactions to the
          device.  The initial sub-address bytes sent are derived from
          the file position according to the device configuration, and

     I2C(3)                                                     I2C(3)

          the length of the data phase is controlled by the requested
          read or write size.  The requested size might be truncated
          by the driver if the request exceeds the logical file-size.

          The control-file provides access to the device configura-
          tion.  When read, it reproduces this configuration in text
          form.  The following text lines are accepted when written to
          the control-file:

          subaddress n  Sets the length n, in bytes, of the sub-
                        address for the device that is derived from
                        the file-position of the data-file.  This can
                        be set to zero if no sub-address bytes should
                        be generated by the driver.  By default, the
                        sub-address length is 1.
          size n        Changes the logical size of the data-file to
                        n. Making sure the file-position is not
                        exceeding this size.


          The file-interface has been inspired by infernos devi2c, but
          with the addition of supporting multiple buses and device